november 2013 fdp10n60nz / fdpf10n60n z ? n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation fdp10n60nz / FDPF10N60NZ rev. c1 www.fairchildsemi.com 1 fdp10n60nz / FDPF10N60NZ n-channel unifet tm ii mosfet 600 v, 10 a, 750 m features ?r ds(on) = 640 m (typ.) @ v gs = 10 v, i d = 5 a ? low gate charge (typ. 23 nc) ?low c rss (typ. 10 pf) ? 100% avalanche tested ? improved dv/dt capability ? esd improved capability ?rohs compliant applications ? lcd/ led/ pdp tv ? lighting ? uninterruptible power supply description unifet tm ii mosfet is fairchild semiconductor?s high voltage mosfet family based on advanced planar stripe and dmos technology. this advanced mosfet family has the smallest on-state resistance among the planar mosfet, and also pro- vides superior switching per formance and higher avalanche energy strength. in addition, internal gate-source esd diode allows unifet ii mosfet to withstand over 2kv hbm surge stress. this device family is suitable for switching power con- verter applications such as power factor correction (pfc), flat panel display (fpd) tv power, atx and electronic lamp bal- lasts. to-220 g d s to-220f g d s g d s mosfet maximum ratings t c = 25 o c unless otherwise noted . *dran current limited by maximum junction temperature. thermal characteristics symbol parameter fdp10n60nz FDPF10N60NZ unit v dss drain to source voltage 600 v v gss gate to source voltage 25 v i d drain current - continuous (t c = 25 o c) 10 10* a - continuous (t c = 100 o c) 6 6* i dm drain current - pulsed (note 1) 40 40* a e as single pulsed avalanche energy (note 2) 550 mj i ar avalanche current (note 1) 10 a e ar repetitive avalanche energy (note 1) 18.5 mj dv/dt peak diode recovery dv/dt (note 3) 10 v/ns p d power dissipation (t c = 25 o c) 185 38 w - derate above 25 o c1.50.3w/ o c t j , t stg operating and storage temperature range -55 to +150 o c t l maximum lead temperature for solderi ng, 1/8? from case for 5 seconds 300 o c symbol parameter fdp10n60nz FDPF10N60NZ unit r jc thermal resistance, junction to case, max. 0.68 3.3 o c/w r ja thermal resistance, junction to ambient, max. 62.5 62.5 free datasheet http://www..net/
fdp10n60nz / fdpf10n60n z ? n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation fdp10n60nz / FDPF10N60NZ rev. c1 www.fairchildsemi.com 2 package marking and ordering information electrical characteristics t c = 25 o c unless otherwise noted. off characteristics on characteristics dynamic characteristics switching characteristics drain-source diod e characteristics part number top mark package packing method reel size tape width quantity fdp10n60nz fdp10n60nz to-220 tube n/a n/a 50 units FDPF10N60NZ FDPF10N60NZ to-220f tube n/a n/a 50 units symbol parameter test conditions min. typ. max. unit bv dss drain to source breakdown voltage i d = 250 a, v gs = 0 v, t j = 25 o c 600 --v bv dss / t j breakdown voltage temperature coefficient i d = 250 a, referenced to 25 o c-0.6-v/ o c i dss zero gate voltage drain current v ds = 600 v, v gs = 0 v - - 1 a v ds = 480 v, t c = 125 o c--10 i gss gate to body leakage current v gs = 25 v, v ds = 0 v - - 10 a v gs(th) gate threshold voltage v gs = v ds , i d = 250 a 3.0 - 5.0 v r ds(on) static drain to source on resistance v gs = 10 v, i d = 5 a - 0.64 0.75 g fs forward transconductance v ds = 20 v, i d = 5 a - 14 - s c iss input capacitance v ds = 25 v, v gs = 0 v, f = 1 mhz - 1110 1475 pf c oss output capacitance - 130 175 pf c rss reverse transfer capacitance - 10 15 pf q g total gate charge at 10v v ds = 480 v, i d = 10 a, v gs = 10 v (note 4) -2330nc q gs gate to source gate charge - 6 - nc q gd gate to drain ?miller? charge - 8 - nc t d(on) turn-on delay time v dd = 300 v, i d = 10 a, v gs = 10 v, r g = 25 w (note 4) -2560ns t r turn-on rise time - 50 110 ns t d(off) turn-off delay time - 70 150 ns t f turn-off fall time - 50 110 ns i s maximum continuous drain to source diode forward current - - 10 a i sm maximum pulsed drain to source diode forward current - - 40 a v sd drain to source diode forward voltage v gs = 0 v, i sd = 10 a - - 1.4 v t rr reverse recovery time v gs = 0 v, i sd = 10 a, di f /dt = 100 a/ s - 300 - ns q rr reverse recovery charge - 2.0 - c notes: 1. repetitive rating: pulse-width limit ed by maximum junction temperature. 2. l = 11 mh, i as = 10 a, v dd = 50 v, r g = 25 , starting t j = 25 c. 3. i sd 10 a, di/dt 200 a/ s, v dd bv dss , starting t j = 25 c. 4. essentially independent of operating temperature typical characteristics. free datasheet http://www..net/
fdp10n60nz / fdpf10n60n z ? n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation fdp10n60nz / FDPF10N60NZ rev. c1 www.fairchildsemi.com 3 typical performance characteristics figure 1. on-region characteristics figure 2. transfer characteristics figure 3. on-resistance variation vs. figure 4. body diode forward voltage drain current and gate vo ltage variation vs. source current and temperature figure 5. capacitance characteristics figure 6. gate charge characteristics 246810 0.1 1 10 100 -55 o c 150 o c *notes: 1. v ds = 20v 2. 250 s pulse test 25 o c i d , drain current[a] v gs , gate-source voltage[v] 0.5 1 10 0.5 1 10 30 *notes: 1. 250 s pulse test 2. t c = 25 o c i d , drain current[a] v ds , drain-source voltage[v] v gs = 15.0v 10.0v 8.0v 7.0v 6.0v 5.5v 0 5 10 15 20 0.5 0.6 0.7 0.8 0.9 1.0 *note: t c = 25 o c v gs = 20v v gs = 10v r ds(on) [ ] , drain-source on-resistance i d , drain current [a] 0.2 0.4 0.6 0.8 1.0 1.2 1.4 0.1 1 10 100 *notes: 1. v gs = 0v 2. 250 s pulse test 150 o c i s , reverse drain current [a] v sd , body diode forward voltage [v] 25 o c 10 -1 110 30 1 10 100 1000 4000 c oss c iss c iss = c gs + c gd ( c ds = shorted ) c oss = c ds + c gd c rss = c gd *note: 1. v gs = 0v 2. f = 1mhz c rss capacitances [pf] v ds , drain-source voltage [v] 0 5 10 15 20 25 0 2 4 6 8 10 *note: i d = 10a v ds = 120v v ds = 300v v ds = 480v v gs , gate-source voltage [v] q g , total gate charge [nc] free datasheet http://www..net/
fdp10n60nz / fdpf10n60n z ? n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation fdp10n60nz / FDPF10N60NZ rev. c1 www.fairchildsemi.com 4 typical performance characteristics (continued) figure 7. breakdown voltage variation figure 8. on-resistance variation vs. temperature vs. temperature figure 9. maximum safe operating area figure 10. maximum safe operating area - fdp10n60nz - FDPF10N60NZ figure 11. maximum drain current vs. case temperature -100 -50 0 50 100 150 0.90 0.95 1.00 1.05 1.10 1.15 *notes: 1. v gs = 0v 2. i d = 250 a bv dss , [normalized] drain-source breakdown voltage t j , junction temperature [ o c ] r ds(on) , [normalized] drain-source on-resistance t j , junction temperature [ o c ] s 100 s 1ms 10ms i d , drain current [a] v ds , drain-source voltage [v] operation in this area is limited by r ds(on) *notes: 1. t c = 25 o c 2. t j = 150 o c 3. single pulse dc 1 10 100 1000 3000 0.01 0.1 1 10 100 30 s 100 s 1ms 10ms i d , drain current [a] v ds , drain-source voltage [v] operation in this area is limited by r ds(on) *notes: 1. t c = 25 o c 2. t j = 150 o c 3. single pulse dc 25 50 75 100 125 150 0 2 4 6 8 10 i d , drain current [a] t c , case temperature [ o c ] free datasheet http://www..net/
fdp10n60nz / fdpf10n60n z ? n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation fdp10n60nz / FDPF10N60NZ rev. c1 www.fairchildsemi.com 5 10 -5 10 -4 10 -3 10 -2 10 -1 110 0.001 0.01 0.1 1 5 0.01 0.1 0.2 0.05 0.02 *notes: 1. z jc (t) = 3.3 o c/w max. 2. duty factor, d= t 1 /t 2 3. t jm - t c = p dm * z jc (t) 0.5 single pulse thermal response [ z jc ] rectangular pulse duration [sec] typical performance characteristics (continued) figure 12. transient thermal response curve - fdp10n60nz figure 13. transient thermal response curve - FDPF10N60NZ 10 -5 10 -4 10 -3 10 -2 10 -1 110 0.005 0.01 0.1 1 2 0.01 0.1 0.2 0.05 0.02 *notes: 1. z jc (t) = 0.68 o c/w max. 2. duty factor, d= t 1 /t 2 3. t jm - t c = p dm * z jc (t) 0.5 single pulse thermal response [ z jc ] rectangular pulse duration [sec] t 1 p dm t 2 z jc (t), thermal response [ o c/w] t 1 , rectangular pulse duration [sec] t 1 p dm t 2 t 1 , rectangular pulse duration [sec] z jc (t), thermal response [ o c/w] free datasheet http://www..net/
fdp10n60nz / fdpf10n60n z ? n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation fdp10n60nz / FDPF10N60NZ rev. c1 www.fairchildsemi.com 6 figure 14. gate charge test circuit & waveform figure 15. resistive switch ing test circuit & waveforms figure 16. unclamped inductive switching test circuit & waveforms v gs v ds 10% 90% t d(on) t r t on t off t d(off) t f v dd 10v v ds r l dut r g v gs v gs v ds 10% 90% t d(on) t r t on t off t d(off) t f v dd 10v v ds r l dut r g v gs v gs v gs i g = const. free datasheet http://www..net/
fdp10n60nz / fdpf10n60n z ? n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation fdp10n60nz / FDPF10N60NZ rev. c1 www.fairchildsemi.com 7 figure 17. peak diode recovery dv/dt test circuit & waveforms dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- dut v ds + _ driver r g same type as dut v gs ? dv/dt controlled by r g ?i sd controlled by pulse period v dd l l i sd 10v v gs ( driver ) i sd ( dut ) v ds ( dut ) v dd body diode forward voltage drop v sd i fm , body diode forward current body diode reverse current i rm body diode recovery dv/dt di/dt d = gate pulse width gate pulse period -------------------------- d = gate pulse width gate pulse period -------------------------- free datasheet http://www..net/
fdp10n60nz / fdpf10n60n z ? n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation fdp10n60nz / FDPF10N60NZ rev. c1 www.fairchildsemi.com 8 mechanical dimensions figure 18. to-220, molded, 3-lead, jedec variation ab package drawings are provided as a servic e to customers considering fairchild co mponents. drawings may change in any manner without notice. please note the revision and/or date on the draw ing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specif- ically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packag ing area for the most recent package drawings: http://www.fairchildsemi.com/package/packagedetails.html?id=pn_tt220-003 free datasheet http://www..net/
fdp10n60nz / fdpf10n60n z ? n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation fdp10n60nz / FDPF10N60NZ rev. c1 www.fairchildsemi.com 9 mechanical dimensions figure 19. to220, molded, 3-lead, full pack, eiaj sc91, straight lead package drawings are provided as a servic e to customers considering fairchild co mponents. drawings may change in any manner without notice. please note the revision and/or date on the draw ing and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specif- ically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packag ing area for the most recent package drawings: http://www.fairchildsemi.com/package/ packagedetails.html?id=pn_tf22s-003 free datasheet http://www..net/
fdp10n60nz / FDPF10N60NZ ? n-channel unifet tm ii mosfet ?2010 fairchild semiconductor corporation fdp10n60nz / FDPF10N60NZ rev. c1 www.fairchildsemi.com 10 trademarks the following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its gl obal subsidiaries, and is not intended to be an exhaustive list of all such trademarks. *trademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fairchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function, or desi gn. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild?s worldwide terms and conditio ns, specifically the warranty therein, which covers these products. life support policy fairchild?s products are not authorized for use as critical components in life support de vices or systems without the express written approval of fai rchild semiconductor corporation. as used here in: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms accupower? 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free datasheet http://www..net/
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